r&s®smw-九游官网下载

• downlink and uplink: up to 16 data channels (plus special channels) per slot, seven slots per subframe, simulation of up to four cells
• channel coding (r&s^®smw-k51): coding of enhanced channels in line with the definition of reference measurement channels in ts 25.102, ts 25.105 and ts 25.142
• siso, mimo and diversity
• graphical code domain and channel graph
• bit error insertion (r&s^®smw-k51): deliberate generation of bit errors by impairing the data stream prior to channel coding or at the physical layer
• block error insertion (r&s^®smw-k51): deliberate generation of block errors by impairing the crc during coding of enhanced channels

this option enhances the r&s^®swm-k50 option (td-scdma digital standard) to support full channel coding and hsdpa/hsupa for evaluating components, power amplifiers, digital baseband receiver chips and rf receivers in user equipment and base stations. the td-scdma firmware package is in accordance with wcdma 3gpp tdd lcr with a chip rate of 1.28 mcps (low chip rate mode).

r&s^®smw-k50 can simulate up to four td-scdma cells, generating the coded p-ccpch (bch with running sfn) and the reference measurement channels (rmc) 12.2 kbps up to 2048 kbps. it can also simulate the hsdpa channels hs-scch, hs-pdsch (qpsk, 16qam and 64qam modulation), hs-sich, hsdpa and hsupa.
the downlink bch, the downlink rmc 12.2 kpbs, 64 kpbs, 144 kpbs and the uplink rmc 12.2 kpbs, 64 kpbs and 144 kpbs channels are generated in realtime. in all other modes, the signal is precalculated and played from the arb memory.