r&s®smab-九游官网下载
- 概览
- features & benefits
high-end adc an dac component tests
with each new adc generation, the analog input bandwidth increases, and with it the required clock frequency. in addition, the larger effective number of bits results in a larger signal-to-noise ratio. the most advanced dacs allow there construction of wideband digitized signals up into the microwave range. this means that extremely clean, high-frequency signals that exceed the dut performance are required to test adcs and dacs. its outstanding performance makes the r&s®sma100b the benchmark solution, giving users a tool that is perfect for not only optimizing duts, but also for bringing them to the very edge of the technically feasible.
when testing adcs, an analog input signal and an external clock signal are needed. at the analog input, the r&s®sma100b supplies the adc with extremely pure rf signalswithextremelylowssbphasenoise, thelowestharmonics and nonharmonics, and the lowest wideband noise. since the signal source does not distort the measurement results, users can validate the spurious-free dynamic range and the signal-to-noise ratio of the most advanced adcs.
because adcs are sampling systems, the wideband phase noise of the clock signal reduces the signal-to-noise ratio oftheadc. the r&s®sma100bwasoptimizedtoprovideclock signals with extremely low wideband phase noise for adc tests. this is particularly important in the case of undersampling, i.e. the clock rate of the adc is lower than twice the maximum rf input frequency.
-
- adc test setup with two r&s®sma100b as the signal sources for the analog
specifically for this application, the r&s®sma100b supplements the rf output with another optional clock output up to 6 ghz with exceptionally low wideband noise for extremely clean clock signals. the frequency of the clock output can be selected independently of the rf output. the signal type (square wave or sine wave), the amplitude and a dc offset can be set for this output independently of the rf output in order to provide single-ended or differential signals for the clock input at the adc.
-
- compact adc test setup with a single r&s®sma100b with an integrated second source.
an extremely clean clock signal is also required to reconstruct the analog output signal when testing dacs. thanks to its excellent characteristics, which include exceptionally low ssb phase noise and a large spurious-free dynamic range, the r&s®sma100b can provide this signal so that the measurement results for these tests are not influenced by the signal source and the user can measure the dut's true performance.
-
- typical test setup for verifying a dac.